Apple A-series and M1 chipmaker TSMC is planning to carry out what is known as risk production of 3nm chips later this year. A 3nm process will be used for future iPhones, although likely not until 2023.

Risk production is the stage at which a foundry has carried out purely internal testing, and believes that it is now ready to try the process on customer designs to see whether those can be successfully produced …

This stage can throw up issues that need to be fixed before the chipmaker can achieve the yields needed for volume production. A Digitimes report says that TSMC expects to be ready for volume production by the second half of 2022.

That would likely be too tight to see 3nm chips in 2022 iPhones, so it’s expected that this new process will be used for 2023 models.

TSMC is on track to move 3nm process technology to risk production in 2021 followed by volume production in the second half of 2022, according to the pure-play foundry.

“Our N3 technology development is on track with good progress,” said TSMC CEO CC Wei at the company’s earnings conference call on January 14. “We are seeing a much higher level of customer engagement for both HPC and smartphone application at N3 as compared with N5 and N7 at a similar stage.”

A TrendForce report published a couple of months ago predicted a revised 5nm process for this year’s iPhone models.

It also suggested that 2022 models would switch to a 4nm process, but using a shortcut approach.

The A15 chip in Apple’s 2021 iPhones will stick with a 5nm process, but will move to an enhanced ‘5nm+’ version […] TSMC refers to 5nm+ as N5P, and describes it as a performance-enhanced version which will combine greater power with improved power efficiency to improve battery-life (or, as might be more likely with Apple, permit smaller-capacity batteries).

That reduced size still offers performance benefits, however, as the smaller chip generates less heat and can therefore operate at full speed for longer before thermal throttling is required.

The A16 chip is expected to use what’s known as a process shrink, or die shrink, version of the 5nm+ version. Rather than being an entirely new chip process, this is a way to shrink the size of an existing chip without any major changes to its design. This gives more chips per wafer, which reduces manufacturing costs.

Photo: Laura Ockel on Unsplash